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 HS-1840ARH
Data Sheet August 1999 File Number 4355.1
Rad-Hard 16 Channel CMOS Analog Multiplexer with High-Z Analog Input Protection
The HS-1840ARH is a radiation hardened, monolithic 16 channel multiplexer constructed with the Intersil Rad-Hard Silicon Gate, bonded wafer, Dielectric Isolation process. It is designed to provide a high input impedance to the analog source if device power fails (open), or the analog signal voltage inadvertently exceeds the supply by up to 35V, regardless of whether the device is powered on or off. Excellent for use in redundant applications, since the secondary device can be operated in a standby unpowered mode affording no additional power drain. More significantly, a very high impedance exists between the active and inactive devices preventing any interaction. One of sixteen channel selection is controlled by a 4-bit binary address plus an Enable-Inhibit input which conveniently controls the ON/OFF operation of several multiplexers in a system. All inputs have electrostatic discharge protection. The HS-1840ARH is processed and screened in full compliance with MIL-PRF-38535 and QML standards. The device is available in a 28 lead SBDIP and a 28 lead Ceramic Flatpack. Specifications for Rad Hard QML devices are controlled by the Defense Supply Center in Columbus (DSCC). The SMD numbers listed here must be used when ordering. Detailed Electrical Specifications for these devices are contained in SMD 5962-95630. A "hot-link" is provided on our homepage for downloading. http://www.intersil.com/spacedefense/space.htm
Features
* Electrically Screened to SMD # 5962-95630 * QML Qualified per MIL-PRF-38535 Requirements * Pin-to-Pin for Intersil's HS-1840RH and HS-1840/883S * Improved Radiation Performance - Gamma Dose () 3 x 105RAD(Si) * Improved rDS(ON) Linearity * Improved Access Time 1.5s (Max) Over Temp and Post Rad * High Analog Input Impedance 500M During Power Loss (Open) * 35V Input Over Voltage Protection (Power On or Off) * Dielectrically Isolated Device Islands * Excellent in Hi-Rel Redundant Systems * Break-Before-Make Switching * No Latch-Up
Ordering Information
ORDERING NUMBER 5962F9563002QXC 5962F9563002QYC 5962F9563002V9A 5962F9563002VXC 5962F9563002VYC INTERNAL MKT. NUMBER HS1-1840ARH-8 HS9-1840ARH-8 HS0-1840ARH-Q HS1-1840ARH-Q HS9-1840ARH-Q TEMP. RANGE (oC) -55 to 125 -55 to 125 25 -55 to 125 -55 to 125 -55 to 125 -55 to 125
HS1-1840ARH/PROTO HS1-1840ARH/PROTO HS9-1840ARH/PROTO HS9-1840ARH/PROTO
Pinouts
HS1-1840ARH (SBDIP) CDIP2-T28 TOP VIEW
+VS 1 NC 2 NC 3 IN 16 4 IN 15 5 IN 14 6 IN 13 7 IN 12 8 IN 11 9 IN 10 10 IN 9 11 GND 12 (+5VS) VREF 13 ADDR A3 14 28 OUT 27 -VS 26 IN 8 25 IN 7 24 IN 6 23 IN 5 22 IN 4 21 IN 3 20 IN 2 19 IN 1 18 ENABLE 17 ADDR A0 16 ADDR A1 15 ADDR A2 +VS NC NC IN 16 IN 15 IN 14 IN 13 IN 12 IN 11 IN 10 IN 9 GND (+5VS) VREF ADDR A3
HS9-1840ARH (FLATPACK) CDFP3-F28 TOP VIEW
1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 OUT -VS IN 8 IN 7 IN 6 IN 5 IN 4 IN 3 IN 2 IN 1 ENABLE ADDR A0 ADDR A1 ADDR A2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999
HS-1840ARH Functional Diagram
IN 1 1 P
A0
A1 DIGITAL ADDRESS A2 OUT
A3
16 EN
P IN 16
ADDRESS INPUT BUFFER AND LEVEL SHIFTER
DECODERS
MULTIPLEX SWITCHES
TRUTH TABLE A3 X L L L L L L L L H H H H H H H H A2 X L L L L H H H H L L L L H H H H A1 X L L H H L L H H L L H H L L H H A0 X L H L H L H L H L H L H L H L H EN H L L L L L L L L L L L L L L L L "ON" CHANNEL None 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
2
HS-1840ARH Burn-In/Life Test Circuits
R +VS R 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 R -VS +VS R 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15
R -VS R
F5 F1 F2 F3
GND F4
GND VR R
NOTES: VS+ = +15.5V 0.5V, VS- = -15.5V 0.5V. R = 1k 5%. C1 = C2 = 0.01F 10%, 1 each per socket, minimum. D1 = D2 = 1N4002, 1 each per board, minimum. Input Signals: square wave, 50% duty cycle, 0V to 15V peak 10%. F1 = 100kHz; F2 = F1/2; F3 = F1/4; F4 = F1/8; F5 = F1/16. FIGURE 1. DYNAMIC BURN-IN AND LIFE TEST CIRCUIT NOTES: 1. The above test circuits are utilized for all package types. 2. The Dynamic Test Circuit is utilized for all life testing.
NOTES: R = 1k 5%, 1/4W. C1 = C2 = 0.01F minimum, 1 each per socket, minimum. VS+ = 15.5V 0.5V, VS- = -15.5V 0.5V, VR = 15.5 0.5V. FIGURE 2. STATIC BURN-IN TEST CIRCUIT
Irradiation Circuit
HS-1840ARH
+15V NC NC +1V
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15 -15V 1k
+5V
NOTE: 3. All irradiation testing is performed in the 28 lead CERDIP package.
3
HS-1840ARH Die Characteristics
DIE DIMENSIONS: (2820m x 4080m x 483m 25.4m) 111 mils x 161 mils x 19 mils 1 mil INTERFACE MATERIALS: Glassivation: Type: PSG (Phosphorus Silicon Glass) Thickness: 8.0kA 1kA Top Metallization: Type: AlSiCu Thickness: 16.0kA 2kA Backside Finish: Silicon ASSEMBLY RELATED INFORMATION: Substrate Potential: Unbiased (DI) ADDITIONAL INFORMATION: Worst Case Current Density: Modified SEM Transistor Count: 407 Process: Radiation Hardened Silicon Gate, Bonded Wafer, Dielectric Isolation
Metallization Mask Layout
HS-1840ARH
IN7 IN6 IN5 IN4 IN3 IN2 IN1
IN8 ENABLE
A0 -V
A1
OUT
A2
+V
A3
VREF IN16 GND
IN15
IN14
IN13
IN12
IN11
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site www.intersil.com 4
IN10
IN9


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